![]() ![]() Master-slave flip-flops tend to be negative-edge-triggered however, the clock input can be inverted in order to make the master-slave flip-flop be positive-edge-triggered. ![]() (electronics) Describing a circuit or component that changes its state only when an input signal becomes low. The master follows the D input while the clock is high, and latches the value of the input at the output of the master on the trailing edge of the clock pulse. What is negative edge-triggered D flip-flop?Ī negative-edge triggered D type master/slave flip-flop consists of a pair of D-latches connected, as shown in Figure 6.20(a).
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